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Eleventh International Conference on VLSI Design: VLSI for Signal Processing
A Modified Line Expansion Algorithm for Device-level Routing of Analog Circuits.
India
January 04-January 07
ISBN: 0-8186-8224-8
ASCII Text
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Prakash Gopalakrishnan, Vinita Vasudevan, "A Modified Line Expansion Algorithm for Device-level Routing of Analog Circuits.," VLSI Design, International Conference on, pp. 249, Eleventh International Conference on VLSI Design: VLSI for Signal Processing, 1998.
 
 
BibTex
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@article{ 10.1109/ICVD.1998.646612,
author = {Prakash Gopalakrishnan and Vinita Vasudevan},
title = {A Modified Line Expansion Algorithm for Device-level Routing of Analog Circuits.},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {1998},
issn = {1063-9667},
pages = {249},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1998.646612},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Design, International Conference on
TI - A Modified Line Expansion Algorithm for Device-level Routing of Analog Circuits.
SN - 1063-9667
SP
EP
A1 - Prakash Gopalakrishnan,
A1 - Vinita Vasudevan,
PY - 1998
KW - analog circuits
KW - routing
KW - layout.
VL - 0
JA - VLSI Design, International Conference on
ER -
 
Prakash Gopalakrishnan, Indian Institute of Technology - Madras.
Vinita Vasudevan, Indian Institute of Technology - Madras.
CAD tools developed for routing of analog circuits have to give special consideration for the quality of routes developed, owing to the high sensitivity of these circuits to small changes in the layout geometry. Cost-based path finding algorithms that find optimal solutions are thus best suited for routing in analog circuits. In this paper, we propose a modification to the line expansion algorithm used previously, that results in significant savings in time and memory consumed.
Index Terms:
analog circuits, routing, layout.
Citation:
Prakash Gopalakrishnan, Vinita Vasudevan, "A Modified Line Expansion Algorithm for Device-level Routing of Analog Circuits.," vlsid, pp.249, Eleventh International Conference on VLSI Design: VLSI for Signal Processing, 1998
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