Tenth International Conference on VLSI Design: VLSI in Multimedia Applications Shake And Bake: A Method of Mapping Code to Irregular DSPs Hyderabad, India January 04-January 07 ISBN: 0-8186-7755-4
Generating high quality code for embedded processors is made difficult by irregular architectures and highly encoded parallel instructions. Rather than deal with the target machine at every stage of compilation, a promising new methodology employs generic algorithms to optimize code for an idealized abstraction of the true target machine. This code is then mapped to the real instruction set by enhanced genetic algorithms. One perturbs the original schedule to find a number of alternative (parallel) instruction sequences, and the other evolves feasible register assignments, if possible, for each sequence. This paper outlines the strategy for mapping idealized code into actual code. The COGEN(T) system employs this methodology to produce good code for different commercial DSPs.
Index Terms:
real-time systems, irregular DSPs, Shake And Bake modules, high quality code generation, embedded processors, irregular architectures, highly encoded parallel instructions, generic algorithms, code optimization, target machine idealized abstraction, code mapping, instruction set, parallel instruction sequences, register assignments, COGEN(T) system, enhanced genetic algorithms
Citation:
T.C. Wilson, G.W. Grewal, "Shake And Bake: A Method of Mapping Code to Irregular DSPs," vlsid, pp.506, Tenth International Conference on VLSI Design: VLSI in Multimedia Applications, 1997 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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