FAMAS: FAult Modeling via Adaptive Simulation

V
VLSID
1997
Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Abstract - FAMAS: FAult Modeling via Adaptive Simulation

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Tenth International Conference on VLSI Design: VLSI in Multimedia Applications

Hyderabad, India

January 04-January 07

ISBN: 0-8186-7755-4

	ASCII Text	x
	H. Jin, R.K. Iyer, M.C. Hsueh, "FAMAS: FAult Modeling via Adaptive Simulation," VLSI Design, International Conference on, pp. 413, Tenth International Conference on VLSI Design: VLSI in Multimedia Applications, 1997.

	BibTex	x
	@article{ 10.1109/ICVD.1997.568168, author = {H. Jin and R.K. Iyer and M.C. Hsueh}, title = {FAMAS: FAult Modeling via Adaptive Simulation}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {1997}, issn = {1063-9667}, pages = {413}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1997.568168}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - FAMAS: FAult Modeling via Adaptive Simulation SN - 1063-9667 SP EP A1 - H. Jin, A1 - R.K. Iyer, A1 - M.C. Hsueh, PY - 1997 KW - integrated circuit modelling KW - FAMAS KW - fault injection KW - adaptive simulation KW - software tool KW - latch error probability KW - transient fault modeling KW - DESSIS KW - device-physics-level simulator KW - SPICE KW - electron hole pairs KW - semiconductor device KW - ionic radiation KW - current surge VL - 0 JA - VLSI Design, International Conference on ER -

H. Jin, Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA

R.K. Iyer, Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA

M.C. Hsueh, Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.1997.568168

This paper describes FAMAS-FAult Modeling via Adaptive Simulation: a software tool that models transient faults and evaluates their impact on latch error probabilities through fault injection. The tool integrates DESSIS (a device-physics-level simulator) and SPICE using an adaptive approach. The behavior of electron hole pairs is captured for semiconductor devices under ionic radiation. Changes in bias voltage due to current surge are taken into account in an iterative fashion during the process of fault model construction. Results show that in general, the adaptively simulated fault model results in higher latch error probabilities than the Messenger model under the same process and electrical conditions.

Index Terms:

integrated circuit modelling, FAMAS, fault injection, adaptive simulation, software tool, latch error probability, transient fault modeling, DESSIS, device-physics-level simulator, SPICE, electron hole pairs, semiconductor device, ionic radiation, current surge

Citation:

H. Jin, R.K. Iyer, M.C. Hsueh, "FAMAS: FAult Modeling via Adaptive Simulation," vlsid, pp.413, Tenth International Conference on VLSI Design: VLSI in Multimedia Applications, 1997

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