A Visual Approach for Asynchronous Circuit Synthesis

V
VLSID
1997
Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Abstract - A Visual Approach for Asynchronous Circuit Synthesis

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	Similar Articles Articles by Radhakrishna Nagalla Articles by Graham Hellestrand

Tenth International Conference on VLSI Design: VLSI in Multimedia Applications

Hyderabad, India

January 04-January 07

ISBN: 0-8186-7755-4

	ASCII Text	x
	Radhakrishna Nagalla, Graham Hellestrand, "A Visual Approach for Asynchronous Circuit Synthesis," VLSI Design, International Conference on, pp. 329, Tenth International Conference on VLSI Design: VLSI in Multimedia Applications, 1997.

	BibTex	x
	@article{ 10.1109/ICVD.1997.568099, author = {Radhakrishna Nagalla and Graham Hellestrand}, title = {A Visual Approach for Asynchronous Circuit Synthesis}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {1997}, issn = {1063-9667}, pages = {329}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1997.568099}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - A Visual Approach for Asynchronous Circuit Synthesis SN - 1063-9667 SP EP A1 - Radhakrishna Nagalla, A1 - Graham Hellestrand, PY - 1997 VL - 0 JA - VLSI Design, International Conference on ER -

Radhakrishna Nagalla, University of New South Wales

Graham Hellestrand, University of New South Wales

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.1997.568099

In this paper a new approach for the synthesis of asynchronous interface circuits from the Signal Transition Graph (STG) specifications will be discussed. As a novel contribution we propose a visual path-oriented algorithm to ascertain whether a given STG has Complete State Coding (CSC) property. Unlike most of the existing algorithms which operate on a state graph, this algorithm operates on the STG. This approach has the advantage of being either easily automated or easier to visually correlate with the STG specifications and to perform by a paper and pencil. Experimental results with a large number of practical asynchronous bench marks are presented.

Citation:

Radhakrishna Nagalla, Graham Hellestrand, "A Visual Approach for Asynchronous Circuit Synthesis," vlsid, pp.329, Tenth International Conference on VLSI Design: VLSI in Multimedia Applications, 1997

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