loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
9th International Conference on VLSI Design: VLSI in Mobile Communication
Instruction Level Power Analysis and Optimization of Software
Bangalore, INDIA
January 03-January 06
ISBN: 0-8186-7228-5
Vivek Tiwari, Princeton Univeristy vivek@ee.princeton.edu
Sharad Malik, Princeton Univeristy vivek@ee.princeton.edu
Andrew Wolfe, Princeton Univeristy vivek@ee.princeton.edu
Mike Tien-Chien Lee, Fujitsu Laboratories of America
Software constitutes a major component of today's systems, and its role is projected to continue to grow. This motivates the need for analyzing power consumption from the point of view of software - something that circuit and gate level power analysis tools are inadequate for. This paper describes an alternative, measurement based instruction level power analysis approach that provides an accurate and practical way of quantifying this cost. This technique has been applied to three commercial, architecturally different microprocessors. This paper presents an overview of the salient results of these analyses. The ability to evaluate software in terms of power consumption makes it feasible to develop tools and techniques for low power software. Several ideas in this regard as suggested by the power analysis of the subject microprocessors are also summarized.
Index Terms:
low power design, low power software, power estimation, power optimization, embedded software, embedded systems
Citation:
Vivek Tiwari, Sharad Malik, Andrew Wolfe, Mike Tien-Chien Lee, "Instruction Level Power Analysis and Optimization of Software," vlsid, pp.326, 9th International Conference on VLSI Design: VLSI in Mobile Communication, 1996
Usage of this product signifies your acceptance of the Terms of Use.