VaWiRAM: a variable width random access memory module

	This Article
	Subscribers, please Login Purchase article: $19 PDF IEEE Xplore Subscribers RSS feed
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan/Endnote
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by L.K. John

9th International Conference on VLSI Design: VLSI in Mobile Communication

Bangalore, INDIA

January 03-January 06

ISBN: 0-8186-7228-5

	ASCII Text	x
	L.K. John, "VaWiRAM: a variable width random access memory module," VLSI Design, International Conference on, pp. 219, 9th International Conference on VLSI Design: VLSI in Mobile Communication, 1996.

	BibTex	x
	@article{ 10.1109/ICVD.1996.489488, author = {L.K. John}, title = {VaWiRAM: a variable width random access memory module}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {1996}, issn = {1063-9667}, pages = {219}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1996.489488}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - VaWiRAM: a variable width random access memory module SN - 1063-9667 SP EP A1 - L.K. John, PY - 1996 KW - reconfigurable architectures; random-access storage; memory architecture; programmable logic devices; integrated circuit interconnections; VaWiRAM; variable width random access memory; flexible memory systems; reconfigurability; programmable logic; programmable interconnect; configuration pins; pass gates VL - 0 JA - VLSI Design, International Conference on ER -

L.K. John, Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.1996.489488

Presents the design of a variable width RAM (VaWiRAM) which will be extremely useful in building flexible memory systems. Principles of reconfigurability of programmable logic and programmable interconnect is incorporated into random access memories to achieve this flexibility. The chip can be reconfigured by setting a few configuration pins on the memory chip. A VaWiRAM reconfigurable between widths 1 and W/sub max/ can be constructed with the extra cost of W/sub max/-1 pass gates, W max/2- to -1 multiplexers, and [log/sub 2/[log/sub 2/(k)+1]] mode pins. The paper discusses the architecture of the proposed VaWiRAMs, and analyzes the trade-offs in their design.

Index Terms:

reconfigurable architectures; random-access storage; memory architecture; programmable logic devices; integrated circuit interconnections; VaWiRAM; variable width random access memory; flexible memory systems; reconfigurability; programmable logic; programmable interconnect; configuration pins; pass gates

Citation:

L.K. John, "VaWiRAM: a variable width random access memory module," vlsid, pp.219, 9th International Conference on VLSI Design: VLSI in Mobile Communication, 1996

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.