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9th International Conference on VLSI Design: VLSI in Mobile Communication
Behavioral Synthesis of Complex Parallel Controllers
Bangalore, INDIA
January 03-January 06
ISBN: 0-8186-7228-5
Krzysztof Bilinski, Department of Electrical & Electronic Engineering University of Bristol Bristol BS8 1TR, United Kingdom
Erik L. Dagless, Department of Electrical & Electronic Engineering University of Bristol Bristol BS8 1TR, United Kingdom
Jonathan M. Saul, Oxford University Computing Laboratory
A CAD system for automatic behavioral synthesis of synchronous parallel controllers from their Petri net specifications is presented. The system operates on an unfolded Petri net's model of a controller, which is called an occurrence net. Having the net unfolded, a set of sequential components of the Petri net is identified, and a state assignment is performed with which the controller can be synthesized. The experimental results show that the method presented in this paper is significantly faster then previous methods.
Citation:
Krzysztof Bilinski, Erik L. Dagless, Jonathan M. Saul, "Behavioral Synthesis of Complex Parallel Controllers," vlsid, pp.186, 9th International Conference on VLSI Design: VLSI in Mobile Communication, 1996
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