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9th International Conference on VLSI Design: VLSI in Mobile Communication
On More Efficient Combinational ATPG Using Functional Learning
Bangalore, INDIA
January 03-January 06
ISBN: 0-8186-7228-5
ASCII Text
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R. Mukherjee, J. Jain, M. Fujita, J. A. Abraham, D. S. Fussell, "On More Efficient Combinational ATPG Using Functional Learning," VLSI Design, International Conference on, pp. 107, 9th International Conference on VLSI Design: VLSI in Mobile Communication, 1996.
 
 
BibTex
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@article{ 10.1109/ICVD.1996.489467,
author = {R. Mukherjee and J. Jain and M. Fujita and J. A. Abraham and D. S. Fussell},
title = {On More Efficient Combinational ATPG Using Functional Learning},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {1996},
issn = {1063-9667},
pages = {107},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1996.489467},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Design, International Conference on
TI - On More Efficient Combinational ATPG Using Functional Learning
SN - 1063-9667
SP
EP
A1 - R. Mukherjee,
A1 - J. Jain,
A1 - M. Fujita,
A1 - J. A. Abraham,
A1 - D. S. Fussell,
PY - 1996
VL - 0
JA - VLSI Design, International Conference on
ER -
 
Learning techniques like SOCRATES and recursive learning have greatly enhanced the technology of FAPY-based ATPG. In this paper we present a test generation methodology for combinational circuits using functional learning, discuss application of novel functional information to enhance ATPG and present ATPG results on ISCAS 85 benchmark circuits. The test generation methodology combines the use of structural (topology) based analysis methods with the function representation techniques (such as BDDs). the use of structural (topology) based analysis methods with the function representation techniques (such as BDDs).
Citation:
R. Mukherjee, J. Jain, M. Fujita, J. A. Abraham, D. S. Fussell, "On More Efficient Combinational ATPG Using Functional Learning," vlsid, pp.107, 9th International Conference on VLSI Design: VLSI in Mobile Communication, 1996
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