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8th International Conference on VLSI Design
Combined optimization of area and testability during state assignment of PLA-based FSM's
New Delhi, India
January 04-January 07
ISBN: 0-8186-6905-5
C.R. Mohan, Cadence Design Syst. (India) Pvt Ltd., Noida, India
P.P. Chakrabarti, Cadence Design Syst. (India) Pvt Ltd., Noida, India
Stuck-at and crosspoint faults in PLA's, introduce combinational and sequential redundancies into PLA-based FSM's, this affecting the testability of these FSM's. In this paper, we propose a new state assignment algorithm for PLA-based FSM's called EARTH, which considers both aspects of area minimization and testability of the resultant PLA's with the fault model containing single stuck-at and/or single cross-point faults. We have also developed an algorithm that checks for redundancies in a PLA-based FSM. We have found the redundancies in FSM's that have been state encoded using EARTH with our redundancy detector and areas of these MCNC Benchmark FSM's. EARTH has yielded 5 times less undetectable faults on these FSMs than NOVA (approx) with areas 2% more than NOVA (approx), on an average.
Index Terms:
state assignment; design for testability; logic CAD; finite state machines; minimisation of switching nets; circuit layout CAD; integrated circuit layout; integrated circuit testing; redundancy; circuit optimisation; fault diagnosis; logic testing; programmable logic arrays; combined optimization; testability optimisation; state assignment; PLA-based FSM; EARTH algorithm; area minimization; fault model; single stuck-at faults; single cross-point faults; redundancy checker
Citation:
C.R. Mohan, P.P. Chakrabarti, "Combined optimization of area and testability during state assignment of PLA-based FSM's," vlsid, pp.408, 8th International Conference on VLSI Design, 1995
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