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2007 International Conference on Parallel Processing Workshops (ICPPW 2007)
Memory Efficient and Low Complexity Variable Length Decoding for MPEG-4 Applications
Xi'an, Chin
September 10-September 14
ISBN: 0-7695-2934-8
Tao Sheng, Huazhong University of Science and Technology, China
Mudar Sarem, Huazhong University of Science and Technology, China
Jingli Zhou, Huazhong University of Science and Technology, China
Variable Length Decoding (VLD) is one of the most computationally expensive parts in a video decoder. Since VLD is an inherent bit-serial operation and is the first stage of the whole decoding task, the overall decoding system performance is determined by its throughput and efficiency. In this paper, a VLD scheme is presented. The proposed VLD tables need less than 6Kbytes memory space, and the decoding procedures are completed by applying numerical properties to codewords identification and symbol indexing. Compared with the direct indexing method, not only the memory space is reduced for symbol information, but also the code efficiency is improved by enabling the compiling code with the near mode. Experimental results show that the proposed solution can improve the VLD speed by 17-43%. This VLD method has been integrated into the developed embedded MPEG-4 video decoder and can perform real-time decoding under eight channels Common Intermediate Format (CIF) frame size.
Citation:
Tao Sheng, Mudar Sarem, Jingli Zhou, "Memory Efficient and Low Complexity Variable Length Decoding for MPEG-4 Applications," icppw, pp.38, 2007 International Conference on Parallel Processing Workshops (ICPPW 2007), 2007
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