2003 International Conference on Parallel Processing (ICPP'03) High-Bandwidth Packet Switching on the Raw General-Purpose Architecture Kaohsiung, Taiwan October 06-October 09 ISBN: 0-7695-2017-0
The switching of packets and other performance-critical tasks in modern Internet routers are done done using Application Specific Integrated Circuits (ASICs) or custom-designed hardware, while existing general-purpose architectures have failed to give a useful interface to sufficient bandwidth to support high-bandwidth routing. By using an architecture that is more general-purpose routers can gain from economies of scale and increased flexibility compared to special-purpose hardware. The work presented in this paper proposes the use of the Raw general-purpose processor as both a network processor and switch fabric for multigigabit routing. We show that the Raw processor, through its tiled architecture and software-exposed on-chip networking, has enough internal and external bandwidth to deal with multigigabit routing.
Citation:
Gleb A. Chuvpilo, Saman Amarasinghe, "High-Bandwidth Packet Switching on the Raw General-Purpose Architecture," icpp, pp.3, 2003 International Conference on Parallel Processing (ICPP'03), 2003 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||