Y.-J. Jang, C.-H. Park, H.-S. Lee, "A Programmable Digital Neuro-Processor Design with Dynamically Reconfigurable Pipeline/Parallel Architecture," Parallel and Distributed Systems, International Conference on, pp. 18, 1998 International Conference on Parallel and Distributed Systems (ICPADS'98), 1998.

@article{ 10.1109/ICPADS.1998.741014,
author = {Y.-J. Jang and C.-H. Park and H.-S. Lee},
title = {A Programmable Digital Neuro-Processor Design with Dynamically Reconfigurable Pipeline/Parallel Architecture},
journal ={Parallel and Distributed Systems, International Conference on},
volume = {0},
year = {1998},
issn = {1521-9097},
pages = {18},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICPADS.1998.741014},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}

TY - CONF
JO - Parallel and Distributed Systems, International Conference on
TI - A Programmable Digital Neuro-Processor Design with Dynamically Reconfigurable Pipeline/Parallel Architecture
SN - 1521-9097
SP
EP
A1 - Y.-J. Jang,
A1 - C.-H. Park,
A1 - H.-S. Lee,
PY - 1998
VL - 0
JA - Parallel and Distributed Systems, International Conference on
ER -