Load balanced Birkoff-von Neumann quasi-circuit switching was proposed to control the packet delay, as well as to solve the head-of-line blocking problem. Quasi-circuit switching, a frame based scheme, is proposed to provides guaranteed rate services. However, as the switch dimension increases, the maximum delay and the size of the one-cycle permutation matrices increase accordingly. In this work, a new architecture - Banyan-based quasi-circuit switching is proposed. A large dimension switch is decomposed into multiple 2..2 frame-based switching elements in order to reduce the implementation complexity. According to the numerical and simulation results, it was found that the performance of the Banyan-based architecture is better than that of the load-balanced architecture. Especially, the standard deviation of the average packet delay can be greatly reduced by applying the proposed architecture. Therefore, the overall packet delay in a network can be well controlled and predicted.