International conference on Networking and Services (ICNS'06) Virtual Delay Vector Based Core-Stateless Packet Scheduling Algorithm Silicon Valley, California, USA July 16-July 18 ISBN: 0-7695-2622-5
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICNS.2006.117
There is an increasing need for scalability in highspeed networks. The core-stateless approaches based on DPS (Dynamic Packet State) technique offer great promise in terms of both scalability and fine-grained service guarantees. But, such core-stateless schemes proposed in the literature can not provide accurate rate guarantee to flows due to the loss of a large part of per-flow state. In this paper, we propose a novel virtual delay vector based core stateless packet scheduling algorithm, called VCSVC(G) (Vector Core- Stateless Virtual Clock algorithm with parameter G), that provides delay guarantee same as Virtual Clock as well as rate guarantee similar to Virtual Clock. This algorithm uses virtual delay vector and partial average techniques to achieve balance between the upper bound on the length of virtual delay vector, G, and the accuracy of rate guarantee. Hence, it can meet a wide range of QoS requirements by setting the parameter G appropriately.
Citation:
Yan Qin, Yong Xiang, Meilin Shi, "Virtual Delay Vector Based Core-Stateless Packet Scheduling Algorithm," icns, pp.94, International conference on Networking and Services (ICNS'06), 2006 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||