2006 IEEE International Conference on Multimedia and Expo Performance-Complexity Analysis of High Resolution Video Encoder and its Memory Organization for DSP Implementation Toronto, ON, Canada July 09-July 12 ISBN: 1-4244-0366-7
This paper first analyses the relationship between performance and complexity of several state-of-the-art coding algorithms for high resolution videos. Based on the coding efficiency comparison under different config parameters and the intra mode usage in P/B frame, this paper presents a practical scheme to improve the coding speed with slight quality loss. And a DSP-oriented two-level internal memory organization is also proposed to keep pipeline processing. In such organization, block correlation caused by motion vector predictions is lightened while keeping almost the same performance as the original.
Citation:
Zhigang Yang, Wen Gao, Yan Liu, "Performance-Complexity Analysis of High Resolution Video Encoder and its Memory Organization for DSP Implementation," icme, pp.1261-1264, 2006 IEEE International Conference on Multimedia and Expo, 2006 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||