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2006 IEEE International Conference on Multimedia and Expo
Scalable Rate-Distortion-Computation Hardware Accelerator for MCTF and ME
Toronto, ON, Canada
July 09-July 12
ISBN: 1-4244-0366-7
Yi-hau Chen, DSP/IC Design Lab., Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan. Email: ttchen@video.ee.ntu.edu.tw
Ching-yeh Chen, DSP/IC Design Lab., Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan. Email: cychen@video.ee.ntu.edu.tw
Chih-chi Cheng, DSP/IC Design Lab., Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan. Email: ccc@video.ee.ntu.edu.tw
Liang-gee Chen, DSP/IC Design Lab., Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan. Email: lgchen@video.ee.ntu.edu.tw
Motion-Compensated Temporal Filtering (MCTF) is an innovative prediction scheme for video coding and the core technology of scalable extension of H.264/AVC. The first MCTF and ME hardware work is in this paper. The proposed hardware not only can support the various coding schemes in JSVM and H. 264 but also can adapt itself to provide rate-distortion-computation scalability. With the frame-level searching range data reuse and frame-interleaved MB pipelining scheme, external memory bandwidth are reduced 33%, and 10 Kbits buffer are saved. The proposed MCTF/ME hardware is of 350K gate counts and 30KB internal buffer, which can perform four-level MCTF or H.264 P-/B-frames at CIF Format.
Citation:
Yi-hau Chen, Ching-yeh Chen, Chih-chi Cheng, Liang-gee Chen, "Scalable Rate-Distortion-Computation Hardware Accelerator for MCTF and ME," icme, pp.365-368, 2006 IEEE International Conference on Multimedia and Expo, 2006
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