Third International Conference on Information Technology and Applications (ICITA'05) Volume 2
A Cost Effective Spacial Redundancy with Data-Path Partitioning
Sydney, Australia
July 04-July 07
ISBN: 0-7695-2316-1
DOI Bookmark:
http://doi.ieeecomputersociety.org/10.1109/ICITA.2005.7
In order to maintain the high reliability of a computer system, it is necessary to detect the failure leading to a fault. In general, fault can be detected by exploiting time redundancy or spatial redundancy. However, it negatively affects on either hardware cost or processor performance. To solve the cost-performance issue, in this paper, we propose a concept of cost-effective approach to achieve spatial redundancy for dependable processors. In addition, we perform a primly evaluation for the impact of our method on processor performance.
Citation:
Shigeharu Matsusaka, Koji Inoue, "A Cost Effective Spacial Redundancy with Data-Path Partitioning," icita, vol. 2, pp.51-56, Third International Conference on Information Technology and Applications (ICITA'05) Volume 2, 2005
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