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Third International Conference on Information Technology and Applications (ICITA'05) Volume 1
A Compression Layer for NAND Type Flash Memory Systems
Sydney, Australia
July 04-July 07
ISBN: 0-7695-2316-1
Wen-Tzeng Huang, National Taipei University of Technology
Chun-Ta Chen, National Taipei University of Technology
Yen-Sheng Chen, National Taipei University of Technology
Chin-Hsing Chen, National Taipei University of Technology
Storage devices of embedded systems must have the characteristics of small size, great capacity, low-power consumption, lightweight, non-volatility, and vibration resistance. The NAND type flash memory, briefly denoted by NandFlash, is one of the more often-used storage devices. In terms of unit price, its cost is several dozen to hundred times more expensive than the traditional Hard-Disk (HD), since its storage space is limited. Therefore, to increase the storage space of NandFlash is great significance. In this paper, we improved the compression layer for NandFlash, which can be coordinated with the X-RL algorithm, to avoid overhead and reduce the degree of internal fragmentation in the compressed data pages. Hence, our proposed method can improve the compression rate. In the reading phase, we use the consecutive memory allocation method, which can reduce the superfluous time caused by non-consecutive access. Therefore, our architecture is meaningful and practical for embedded system applications.
Index Terms:
NandFlash, Embedded system, Compression Algorithm, X-RL
Citation:
Wen-Tzeng Huang, Chun-Ta Chen, Yen-Sheng Chen, Chin-Hsing Chen, "A Compression Layer for NAND Type Flash Memory Systems," icita, vol. 1, pp.599-604, Third International Conference on Information Technology and Applications (ICITA'05) Volume 1, 2005
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