Third International Conference on Information Technology and Applications (ICITA'05) Volume 1 Zero-Skew Driven for RLC Clock Tree Construction in SoC Sydney, Australia July 04-July 07 ISBN: 0-7695-2316-1
In this paper, we observe that the clock tree in a SoC is unbalanced in nature and derive that a RC clock tree has the characteristic of exact zero-skew upward propagation but not for an unbalanced RLC clock tree. Illustrated inductions are helped to prove the observation. We develop a zero-skew driven algorithm for constructing a RLC clock tree to minimize the skew. More examples and benchmarks are evaluated. The difference in skew ratio and the tolerance in path delay compared with HSPICE are 1.15409% and 10.645%, respectively, on average.
Index Terms:
Clock tree, RLC delay model, Zero skew, Upward propagation, SoC
Citation:
Chia-Chun Tsai, Jan-Ou Wu, Chung-Chieh Kuo, Trong-Yen Lee, Wen-Ta Lee, "Zero-Skew Driven for RLC Clock Tree Construction in SoC," icita, vol. 1, pp.561-566, Third International Conference on Information Technology and Applications (ICITA'05) Volume 1, 2005 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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