Buffered clock-tree design, with cells at its leaves, are known to meet timing and skew requirements better. Clustering of flip-flops leads to reduced clock-tree wirelengths and power-efficient layouts. In this paper, the problem of clustering flip-flops in a given placement is formulated as Multi-way Equi-Partitioning of a given point set, such that (i) total area of the partition (ii) area of the largest partition and (iii) total deviation of the partitions, are minimal. For this computationally expensive multiobjective optimization problem, also relevant to design of semi-synchronous systems, a technique based on genetic algorithm, is proposed. Crossover and mutation operators specific to the k-way equipartitioning problem, have been designed and a new greedy heuristic operator is employed to accelerate the convergence. Results on data sets obtained from layouts of ISCAS89 benchmark circuit demonstrate the effectiveness of the proposed method.