1995 International Conference on Image Processing (ICIP'95) - Volume 1
A new programmable VLSI architecture for histogram and statistics computation in different windows
Washington D.C.
October 23-October 26
ISBN: 0-8186-7310-9
The grey-scale histogram of an image has become important for image preprocessing methods. Histograms are employed in generating binary images (segmentation), data compression, image enhancement and elimination of inhomogeneous illumination. Even the co-occurrence-matrix (texture analysis) is obtained by performing simple increment operations, e.g. histogramming. A new concept and architecture has been developed to compute real-time histograms and statistics in up to four window areas. The size and location of these windows can be defined and the methods mentioned above can be verified. This paper introduces the recently developed VLSI architecture (histogrammer) and the required instances to realise window handling. The special configuration of the memory and arithmetic unit is explained. Furthermore, it describes other applications of the architecture for texture analysis and equalisation. Simulation results and implementation of the design are presented.
Index Terms:
VLSI; statistics; image segmentation; data compression; image enhancement; image texture; digital signal processing chips; CMOS digital integrated circuits; programmable VLSI architecture; statistics computation; histogram computation; grey-scale histogram; image preprocessing methods; binary images; segmentation; data compression; image enhancement; inhomogeneous illumination elimination; co-occurrence-matrix; texture analysis; simple increment operations; histogrammer; window handling; arithmetic unit configuration; memory configuration; equalisation; simulation; CMOS technology
Citation:
S. Muller, "A new programmable VLSI architecture for histogram and statistics computation in different windows," icip, vol. 1, pp.73, 1995 International Conference on Image Processing (ICIP'95) - Volume 1, 1995