2005 International Conference on Computer Design Fault Tolerant Asynchronous Adder through Dynamic Self-reconfiguration San Jose, California October 02-October 05 ISBN: 0-7695-2451-6
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICCD.2005.56
This paper presents a systematic method for the design of a self-healing asynchronous adder. We propose a graphbased model for the design of a fault-tolerant linear array with external inputs and outputs with a minimum number of spare resources. A K-fault-tolerant asynchronous adder design is presented based on this analysis, together with the necessary support logic for dynamic self-reconfiguration. Experimental evaluations show that our method incurs both low hardware cost and small performance overhead compared to traditional approaches to fault-tolerance.
Citation:
Song Peng, Rajit Manohar, "Fault Tolerant Asynchronous Adder through Dynamic Self-reconfiguration," iccd, pp.171-179, 2005 International Conference on Computer Design, 2005 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||