Technology scaling has led to a reduction in the stored charge in SRAM memories. This has increased their vulnerability to soft errors. Conventional approaches to detect/correct soft errors, such as ECC, have limitation in the number of soft errors that can be tolerated. In this paper, we propose a soft error detection circuit which utilizes a current mirror to translate switching current pulses induced by soft errors into voltage pulses. This pulse is then sensed by a Schmitt trigger to generate an error signal. Our experimental results show that the proposed scheme is tolerant to process variation and results in low power overhead without significantly affecting performance.