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2005 International Conference on Computer Design
The TM3270 Media-Processor Data Cache
San Jose, California
October 02-October 05
ISBN: 0-7695-2451-6
ASCII Text
x 
 
Jan-Willem van de Waerdt, Stamatis Vassiliadis, Jean-Paul van Itegem, Hans van Antwerpen, "The TM3270 Media-Processor Data Cache," Computer Design, International Conference on, pp. 334-341, 2005 International Conference on Computer Design, 2005.
 
 
BibTex
x
 
@article{ 10.1109/ICCD.2005.107,
author = {Jan-Willem van de Waerdt and Stamatis Vassiliadis and Jean-Paul van Itegem and Hans van Antwerpen},
title = {The TM3270 Media-Processor Data Cache},
journal ={Computer Design, International Conference on},
volume = {0},
year = {2005},
isbn = {0-7695-2451-6},
pages = {334-341},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICCD.2005.107},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Computer Design, International Conference on
TI - The TM3270 Media-Processor Data Cache
SN - 0-7695-2451-6
SP334
EP341
A1 - Jan-Willem van de Waerdt,
A1 - Stamatis Vassiliadis,
A1 - Jean-Paul van Itegem,
A1 - Hans van Antwerpen,
PY - 2005
KW - null
VL - 0
JA - Computer Design, International Conference on
ER -
 
Jan-Willem van de Waerdt, Philips Semiconductors, San Jose, CA, USA
Stamatis Vassiliadis, Delft University of Technology Delft, The Netherlands
Jean-Paul van Itegem, Philips Semiconductors, San Jose, CA, USA
Hans van Antwerpen, Philips Semiconductors, San Jose, CA, USA

This paper describes the (micro-) architecture of the TM3270 data cache. We present the cache parameters, such as cache size, associativity, line size and cache policies. We describe the data cache pipeline partitioning and the cache memory structure organization. We introduce "collapsed" and "twoslot" load operations. Furthermore, we introduce a combined software/hardware based technique for prefetching of data into the cache. We use an MPEG2 encoder application for a quantative evaluation of architectural aspects such as data prefetching and show that MPEG2 encoding at 352*288 resolution (CIF) at 25 frames per second can be performed in 33.3 MHz.

Citation:
Jan-Willem van de Waerdt, Stamatis Vassiliadis, Jean-Paul van Itegem, Hans van Antwerpen, "The TM3270 Media-Processor Data Cache," iccd, pp.334-341, 2005 International Conference on Computer Design, 2005
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