2003 IEEE International Conference on Computer Design (ICCD'03) Test Data Compression and Compaction for Embedded Test of Nanometer Technology Designs San Jose, California October 13-October 15 ISBN: 0-7695-2025-1
In its first part, this paper examines various forms of embedded deterministic test with particular emphasis on input stimuli compression and test response compaction schemes. Subsequently, the Embedded Deterministic Test (EDT) scheme, which significantly reduces manufacturing test cost by providing a dramatic reduction in scan test data volume and scan test time, is discussed.
Citation:
Janusz Rajski, Jerzy Tyszer, "Test Data Compression and Compaction for Embedded Test of Nanometer Technology Designs," iccd, pp.331, 2003 IEEE International Conference on Computer Design (ICCD'03), 2003 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||