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2003 IEEE International Conference on Computer Design (ICCD'03)
Profiling Interrupt Handler Performance through Kernel Instrumentation
San Jose, California
October 13-October 15
ISBN: 0-7695-2025-1
ASCII Text
x 
 
Branden Moore, Thomas Slabach, Lambert Schaelicke, "Profiling Interrupt Handler Performance through Kernel Instrumentation," Computer Design, International Conference on, pp. 156, 2003 IEEE International Conference on Computer Design (ICCD'03), 2003.
 
 
BibTex
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@article{ 10.1109/ICCD.2003.1240889,
author = {Branden Moore and Thomas Slabach and Lambert Schaelicke},
title = {Profiling Interrupt Handler Performance through Kernel Instrumentation},
journal ={Computer Design, International Conference on},
volume = {0},
year = {2003},
issn = {1063-6404},
pages = {156},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICCD.2003.1240889},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Computer Design, International Conference on
TI - Profiling Interrupt Handler Performance through Kernel Instrumentation
SN - 1063-6404
SP
EP
A1 - Branden Moore,
A1 - Thomas Slabach,
A1 - Lambert Schaelicke,
PY - 2003
KW - null
VL - 0
JA - Computer Design, International Conference on
ER -
 
Branden Moore, University of Notre Dame
Thomas Slabach, University of Notre Dame
Lambert Schaelicke, University of Notre Dame
As a result of technology trends towards multi-gigahertz processors, the I/O system is becoming a critical bottleneck for many applications. Interrupts are a major aspect of most device drivers. Characterizing interrupt performance and its relation to architectural trends is important for understanding and improving I/O subsystem performance. Kernel instrumentation in combination with performance counters is able to overcome the limitations of microbenchmarks when measuring interrupts. A comparative analysis of a range of IA-32 based systems reveals that interrupt handler code exhibits only a low degree of instruction-level parallelism. Consequently, the trend towards deeper processor pipelines and smaller caches to maximize clock frequency can be detrimental to interrupt handling performance.
Citation:
Branden Moore, Thomas Slabach, Lambert Schaelicke, "Profiling Interrupt Handler Performance through Kernel Instrumentation," iccd, pp.156, 2003 IEEE International Conference on Computer Design (ICCD'03), 2003
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