2003 IEEE International Conference on Computer Design (ICCD'03) Specifying and Verifying Systems with Multiple Clocks San Jose, California October 13-October 15 ISBN: 0-7695-2025-1
Multiple clock domains are a challenge for hardware specification and verification. We present a method for specifying the relations between multiple clocks, and for modeling the possible behaviors. We can then verify a hardware design assuming that the clocks meet these constraints. We implement our ideas in the context of SAT based Bounded Model Checking (BMC), using ANSI-C programs to specify the functional behavior of the design.
Citation:
Edmund M. Clarke, Daniel Kroening, Karen Yorav, "Specifying and Verifying Systems with Multiple Clocks," iccd, pp.48, 2003 IEEE International Conference on Computer Design (ICCD'03), 2003 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||