2000 IEEE International Conference on Computer Design (ICCD'00) Low Power Video Object Motion-Tracking Architecture for Very Low Bit Rate Online Video Applications Austin, Texas September 17-September 20 ISBN: 0-7695-0801-4
This paper presents low power VLSI architecture for video object motion tracking that can be used in very low bit rate online video applications. Power has been reduced at both algorithmic and arithmetic levels. The video object motion-tracking architecture consists of two main parts, a mesh-based motion estimation unit and a mesh-based motion compensation unit. The mesh-based motion estimation unit implements parallel block matching motion estimation units to optimize the latency. The mesh-based motion compensation unit uses parallel multiplication-free affine core. The architecture has been prototyped and its performance measures have been evaluated. This processor can be used in online object-based video applications.
Citation:
Wael Badawy, Magdy Bayoumi, "Low Power Video Object Motion-Tracking Architecture for Very Low Bit Rate Online Video Applications," iccd, pp.533, 2000 IEEE International Conference on Computer Design (ICCD'00), 2000 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||