The International Symposium on Parallel Architectures, Algorithms, and Networks (i-span 2008) Using an MDE Approach for Modeling of Interconnection Networks May 07-May 09 ISBN: 978-0-7695-3125-0
As System-on-Chip (SoCs) become more complex, highperformance interconnection mediums are required to handle their complexity. Network-on-Chips (NoCs) enable integration of more Intellectual Properties (IPs) into theSoC with increased performance. In the recent MARTE(Modeling and Analysis of Real-time and EmbeddedSystems) Profile, a notion of multidimensional multiplicity has been proposed to model repetitive structures and topologies. This paper presents a modeling methodology based on that notation to model the Delta Network family of Interconnection Networks for NoC construction.
Index Terms:
SoC, NoC, MINs, Delta Networks, MARTE, MDE, UML2 Templates
Citation:
Imran Rafiq Quadri, Pierre Boulet, Samy Meftali, Jean-Luc Dekeyser, "Using an MDE Approach for Modeling of Interconnection Networks," ispan, pp.289-294, The International Symposium on Parallel Architectures, Algorithms, and Networks (i-span 2008), 2008 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||