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2nd IEEE Symposium on High-Performance Computer Architecture (HPCA '96)
Performance Characterization of the Alpha 21164 Microprocessor Using TP and SPEC Workloads
San Jose, CA
February 03-February 07
ISBN: 0-8186-7237-4
ASCII Text
x 
 
Zarka Cvetanovic, Dileep Bhandarkar, "Performance Characterization of the Alpha 21164 Microprocessor Using TP and SPEC Workloads," High-Performance Computer Architecture, International Symposium on, pp. 270, 2nd IEEE Symposium on High-Performance Computer Architecture (HPCA '96), 1996.
 
 
BibTex
x
 
@article{ 10.1109/HPCA.1996.501192,
author = {Zarka Cvetanovic and Dileep Bhandarkar},
title = {Performance Characterization of the Alpha 21164 Microprocessor Using TP and SPEC Workloads},
journal ={High-Performance Computer Architecture, International Symposium on},
volume = {0},
year = {1996},
isbn = {0-8186-7237-4},
pages = {270},
doi = {http://doi.ieeecomputersociety.org/10.1109/HPCA.1996.501192},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - High-Performance Computer Architecture, International Symposium on
TI - Performance Characterization of the Alpha 21164 Microprocessor Using TP and SPEC Workloads
SN - 0-8186-7237-4
SP
EP
A1 - Zarka Cvetanovic,
A1 - Dileep Bhandarkar,
PY - 1996
VL - 0
JA - High-Performance Computer Architecture, International Symposium on
ER -
 
Zarka Cvetanovic, Digital Equipment Corporation
Dileep Bhandarkar, Intel Corporation
This paper compares the performance characteristics of the Alpha 21164 to the previous-generation 21064 microprocessor. Measurements on the 21164-based AlphaServer 8200 system are compared to the 21064-based DEC 7000 server using several commercial and technical workloads. The data analyzed includes cycles per instruction, multiple-issued instructions, branch predictions, stall components, cache misses, and instruction frequencies. The AlphaServer 8200 provides 2 to 3 times the performance of the DEC 7000 server based on the faster clock, larger on-chip cache, expanded multiple-issuing, and lower cache/memory latencies and higher bandwidth.
Citation:
Zarka Cvetanovic, Dileep Bhandarkar, "Performance Characterization of the Alpha 21164 Microprocessor Using TP and SPEC Workloads," hpca, pp.270, 2nd IEEE Symposium on High-Performance Computer Architecture (HPCA '96), 1996
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