Applying taking the advantage of high performance computing technology, a Dynamic Parallel Genetic Algorithm (DPGA) has been developed in IHPC for DSM/VDSM chip planning. We presented a new Speckle model for searching the optimal solutions in a multi-dimension space. Some new principles in Peristalsis operators have been developed for density searching purpose. Dynamic Control strategies in solution evaluation, ranking, crossover, mutation and peristalsis control have been developed. Parallel Racial Inheritance has implemented a two-dimension migration in the process.Comparing with the sequential genetic algorithm with static control parameters (SSGA, some academic and industrial benchmark statistical results have shown that the average probability to reach the optimal result within 3% error will be improved from 0%-10% to over 90%. In the chip planning, the DPGA 2.01 can speed up 400 times comparing with SSGA. The average of design density could be improved by 5-18% comparing with SSGA. DPGA has been filed for a patent on 23 June 1999.