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Fifth International Conference on High Performance Computing
Precise Control of Instruction Caches
Madras, India
December 17-December 20
ISBN: 0-8186-9194-8
Instruction caches are usually designed to fetch the whole block from memory in case of a miss. However, the fetched blocks might contain branch instructions which if taken will render the rest of the block useless. In this paper a new approach is introduced, namely the Precise Control, which fetches only the words of a cache block that are likely to be used. The performance of Precise Control is evaluated and it is shown that it has a positive influence on system's performance. Precise Control reduces the words fetched from memory by up to 60%, thus reducing significantly the communication overhead between cache and main memory as well as the total execution time.
Citation:
Maria Smirli, Dimitris Lioupis, Kevin Kissell, "Precise Control of Instruction Caches," hipc, pp.11, Fifth International Conference on High Performance Computing, 1998
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