On the case study of block turbo decoders for error correction, the paper shows that the use of unconventional framework like Madeo can produce interesting FPGA implementations.

Error correction algorithms are known to be very important for communication data rate and reliability. As reconfigurable architectures are attractive for fast prototyping and flexibility, they are often considered as support for implementation of communication, including mobile communication.

Madeo is an open framework for designing physical FPGA architectures and their applications. On the basis of an abstract model for reconfigurable circuits, Madeo provides the necessary tools (logic synthesis and physical tool) to program them.

The paper describes the block turbo decoder principle, discusses existing solutions and presents characteristics of a partial implementation on the open framework Madeo. Three elements of a block turbo decoder have been designed using Madeo and the physical solutions compete very well with existing solutions for such problems.