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28th Hawaii International Conference on System Sciences (HICSS'95)
Hawaii, USA
January 04-January 07
ISBN: 0-8186-6930-6
ASCII Text
x 
 
K.Y. Wu, P.K.H. Ng, X.D. Jia, R.M.M. Chen, A.M. Layfield, "Performance tuning of a multiprocessor sparse matrix equation solver," Hawaii International Conference on System Sciences, pp. 4, 28th Hawaii International Conference on System Sciences (HICSS'95), 1995.
 
 
BibTex
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@article{ 10.1109/HICSS.1995.375414,
author = {K.Y. Wu and P.K.H. Ng and X.D. Jia and R.M.M. Chen and A.M. Layfield},
title = {Performance tuning of a multiprocessor sparse matrix equation solver},
journal ={Hawaii International Conference on System Sciences},
volume = {0},
year = {1995},
issn = {1060-3425},
pages = {4},
doi = {http://doi.ieeecomputersociety.org/10.1109/HICSS.1995.375414},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Hawaii International Conference on System Sciences
TI - Performance tuning of a multiprocessor sparse matrix equation solver
SN - 1060-3425
SP
EP
A1 - K.Y. Wu,
A1 - P.K.H. Ng,
A1 - X.D. Jia,
A1 - R.M.M. Chen,
A1 - A.M. Layfield,
PY - 1995
KW - circuit analysis computing; sparse matrices; parallel algorithms; SPICE; multiprocessor sparse matrix equation solver; sparse matrix equation; linear simultaneous equations; electrical circuit; SPICE; multiprocessor implementation; circuit simulation; performance tuning; parallel direct method
VL - 0
JA - Hawaii International Conference on System Sciences
ER -
 
K.Y. Wu, Dept. of Electron. Eng., City Polytech. of Hong Kong, Kowloon, Hong Kong
P.K.H. Ng, Dept. of Electron. Eng., City Polytech. of Hong Kong, Kowloon, Hong Kong
X.D. Jia, Dept. of Electron. Eng., City Polytech. of Hong Kong, Kowloon, Hong Kong
R.M.M. Chen, Dept. of Electron. Eng., City Polytech. of Hong Kong, Kowloon, Hong Kong
A.M. Layfield, Dept. of Electron. Eng., City Polytech. of Hong Kong, Kowloon, Hong Kong
Solving a system of linear simultaneous equations representing an electrical circuit is one of the most time consuming tasks for large scale circuit simulations. In order to facilitate a multiprocessor implementation of the circuit simulation program SPICE, a decomposition algorithm is employed to partition the sparse matrix equation of an overall circuit into a number of sub-circuit equations for parallel processing. In this paper, various implementation and performance tuning issues of a parallel direct method matrix equation solving routine is reported. This routine is written in such a manner that the data structure is compatible with SPICE Version 3Cl. The speed-up obtained for the simulation of several test circuits on a message passing multiprocessor system built on Transputers will be reported.
Index Terms:
circuit analysis computing; sparse matrices; parallel algorithms; SPICE; multiprocessor sparse matrix equation solver; sparse matrix equation; linear simultaneous equations; electrical circuit; SPICE; multiprocessor implementation; circuit simulation; performance tuning; parallel direct method
Citation:
K.Y. Wu, P.K.H. Ng, X.D. Jia, R.M.M. Chen, A.M. Layfield, "Performance tuning of a multiprocessor sparse matrix equation solver," hicss, pp.4, 28th Hawaii International Conference on System Sciences (HICSS'95), 1995
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