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Ninth Great Lakes Symposium on VLSI
Bounding Algorithms for Design Space Exploration
Ann Arbor, Michigan
March 04-March 06
ISBN: 0-7695-0104-4
ASCII Text
x 
 
Samit Chaudhuri, Robert A. Walker, "Bounding Algorithms for Design Space Exploration," Great Lakes Symposium on VLSI, pp. 234, Ninth Great Lakes Symposium on VLSI, 1999.
 
 
BibTex
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@article{ 10.1109/GLSV.1999.757420,
author = {Samit Chaudhuri and Robert A. Walker},
title = {Bounding Algorithms for Design Space Exploration},
journal ={Great Lakes Symposium on VLSI},
volume = {0},
year = {1999},
issn = {1066-1395},
pages = {234},
doi = {http://doi.ieeecomputersociety.org/10.1109/GLSV.1999.757420},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Great Lakes Symposium on VLSI
TI - Bounding Algorithms for Design Space Exploration
SN - 1066-1395
SP
EP
A1 - Samit Chaudhuri,
A1 - Robert A. Walker,
PY - 1999
VL - 0
JA - Great Lakes Symposium on VLSI
ER -
 
Samit Chaudhuri, Magrnu Design Automatim
Robert A. Walker, Kent State University
This paper describes .several new algorithms J&R computing lower bounds on the length of the schedule and the number of functional units in high-level synthesis.
Citation:
Samit Chaudhuri, Robert A. Walker, "Bounding Algorithms for Design Space Exploration," glsvlsi, pp.234, Ninth Great Lakes Symposium on VLSI, 1999
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