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Fifth Great Lakes Symposium on VLSI (GLSVLSI'95)
OPRON: a new approach to planar OTC routing
The State University of New York at Buffalo
March 16-March 18
ISBN: 0-8186-7035-5
ASCII Text
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S. Danda, S. Madhwapathy, N. Sherwani, A. Sureka, "OPRON: a new approach to planar OTC routing," Great Lakes Symposium on VLSI, pp. 208, Fifth Great Lakes Symposium on VLSI (GLSVLSI'95), 1995.
 
 
BibTex
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@article{ 10.1109/GLSV.1995.516054,
author = {S. Danda and S. Madhwapathy and N. Sherwani and A. Sureka},
title = {OPRON: a new approach to planar OTC routing},
journal ={Great Lakes Symposium on VLSI},
volume = {0},
year = {1995},
issn = {1066-1395},
pages = {208},
doi = {http://doi.ieeecomputersociety.org/10.1109/GLSV.1995.516054},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Great Lakes Symposium on VLSI
TI - OPRON: a new approach to planar OTC routing
SN - 1066-1395
SP
EP
A1 - S. Danda,
A1 - S. Madhwapathy,
A1 - N. Sherwani,
A1 - A. Sureka,
PY - 1995
KW - network routing; dynamic programming; VLSI; integrated circuit layout; circuit layout CAD; OPRON; planar OTC routing; planar over-the-cell routing; dynamic programming algorithm; VLSI layout
VL - 0
JA - Great Lakes Symposium on VLSI
ER -
 
S. Danda, Dept. of Comput. Sci., Western Michigan Univ., Kalamazoo, MI, USA
S. Madhwapathy, Dept. of Comput. Sci., Western Michigan Univ., Kalamazoo, MI, USA
N. Sherwani, Dept. of Comput. Sci., Western Michigan Univ., Kalamazoo, MI, USA
A. Sureka, Dept. of Comput. Sci., Western Michigan Univ., Kalamazoo, MI, USA
In this paper we solve the planar over-the-cell routing problem, in which nets must have at least one terminal on the boundary. Such nets allow for nontraditional cell designs, where all terminals must be placed on the boundaries giving a degree of freedom to the cell designer. We present a dynamic programming algorithm that optimally solves this problem, in O(K/sup 2/n/sup 4/) time, where K is the number of tracks available over the cell for a given cell row region, and n is the number of nets to be routed.
Index Terms:
network routing; dynamic programming; VLSI; integrated circuit layout; circuit layout CAD; OPRON; planar OTC routing; planar over-the-cell routing; dynamic programming algorithm; VLSI layout
Citation:
S. Danda, S. Madhwapathy, N. Sherwani, A. Sureka, "OPRON: a new approach to planar OTC routing," glsvlsi, pp.208, Fifth Great Lakes Symposium on VLSI (GLSVLSI'95), 1995
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