loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Fifth International Conference on Grid and Cooperative Computing (GCC'06)
The Impact of Parallel and Multithread Mechanism on Network Processor Performance
Hunan, China
October 21-October 23
ISBN: 0-7695-2694-2
ASCII Text
x 
 
Chunqing Wu, Xiangquan Shi, Xuejun Yang, Jinshu Su, "The Impact of Parallel and Multithread Mechanism on Network Processor Performance," Grid and Cooperative Computing, International Conference on, pp. 236-240, Fifth International Conference on Grid and Cooperative Computing (GCC'06), 2006.
 
 
BibTex
x
 
@article{ 10.1109/GCC.2006.91,
author = {Chunqing Wu and Xiangquan Shi and Xuejun Yang and Jinshu Su},
title = {The Impact of Parallel and Multithread Mechanism on Network Processor Performance},
journal ={Grid and Cooperative Computing, International Conference on},
volume = {0},
year = {2006},
isbn = {0-7695-2694-2},
pages = {236-240},
doi = {http://doi.ieeecomputersociety.org/10.1109/GCC.2006.91},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Grid and Cooperative Computing, International Conference on
TI - The Impact of Parallel and Multithread Mechanism on Network Processor Performance
SN - 0-7695-2694-2
SP236
EP240
A1 - Chunqing Wu,
A1 - Xiangquan Shi,
A1 - Xuejun Yang,
A1 - Jinshu Su,
PY - 2006
KW - null
VL - 0
JA - Grid and Cooperative Computing, International Conference on
ER -
 
Chunqing Wu, National University of Defense Technology, China
Xiangquan Shi, National University of Defense Technology, China
Xuejun Yang, National University of Defense Technology, China
Jinshu Su, National University of Defense Technology, China
Network processors are becoming a predominant feature in the field of network hardware due to its high performance and flexibility. The performance of network processor mainly depends on its architecture. This paper studied the parallel architecture and multithread mechanism in network processor. We discussed reasons of thread stalls and the principle of hiding latencies caused by various stalls using multithread mechanism. Lastly, we present the test results based on analyzing the relationship of active thread number and the performance of network processor.
Citation:
Chunqing Wu, Xiangquan Shi, Xuejun Yang, Jinshu Su, "The Impact of Parallel and Multithread Mechanism on Network Processor Performance," gcc, pp.236-240, Fifth International Conference on Grid and Cooperative Computing (GCC'06), 2006
Usage of this product signifies your acceptance of the Terms of Use.