Benjamin Levine, R. Reed Taylor, Herman Schmit, "Implementation of Near Shannon Limit Error-Correcting Codes Using Reconfigurable Hardware," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 217, 2000 IEEE Symposium on Field-Programmable Custom Computing Machines, 2000.

@article{ 10.1109/FPGA.2000.903409,
author = {Benjamin Levine and R. Reed Taylor and Herman Schmit},
title = {Implementation of Near Shannon Limit Error-Correcting Codes Using Reconfigurable Hardware},
journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on},
volume = {0},
year = {2000},
issn = {1082-3409},
pages = {217},
doi = {http://doi.ieeecomputersociety.org/10.1109/FPGA.2000.903409},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}

TY - CONF
JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
TI - Implementation of Near Shannon Limit Error-Correcting Codes Using Reconfigurable Hardware
SN - 1082-3409
SP
EP
A1 - Benjamin Levine,
A1 - R. Reed Taylor,
A1 - Herman Schmit,
PY - 2000
KW - turbo codes
KW - error correcting codes
KW - low-density parity check codes
VL - 0
JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
ER -