Design of FCCMs is an expensive and time-consuming process, requiring a specialized software and hardware design for each application. A new class of architecture and compiler for customized computers called PECompiler that can automatically generate both hardware and software for field-programmable compute accelerators was recently introduced. This paper presents the parameterized compute accelerator and example applications that have been compiled for it. A generic Very Long Instruction Word (VLIW) instruction set is defined for the proposed compute accelerator architecture. Hardware accelerators are designed and implemented for two application programs on the TM-2 based system. It is demonstrated that for these two application programs, the hardware accelerators can provide significant performance improvement over a general-purpose CPU.