Digit-Serial DSP Library for Optimized FPGA Configuration

F
FCCM
1998
IEEE Symposium on FPGAs for Custom Computing Machines
Abstract - Digit-Serial DSP Library for Optimized FPGA Configuration

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	Similar Articles Articles by Hanho Lee Articles by Gerald E. Sobelman

IEEE Symposium on FPGAs for Custom Computing Machines

Napa Valley, California

April 15-April 17

ISBN: 0-8186-8900-5

	ASCII Text	x
	Hanho Lee, Gerald E. Sobelman, "Digit-Serial DSP Library for Optimized FPGA Configuration," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 322, IEEE Symposium on FPGAs for Custom Computing Machines, 1998.

	BibTex	x
	@article{ 10.1109/FPGA.1998.707936, author = {Hanho Lee and Gerald E. Sobelman}, title = {Digit-Serial DSP Library for Optimized FPGA Configuration}, journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on}, volume = {0}, year = {1998}, issn = {1082-3409}, pages = {322}, doi = {http://doi.ieeecomputersociety.org/10.1109/FPGA.1998.707936}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on TI - Digit-Serial DSP Library for Optimized FPGA Configuration SN - 1082-3409 SP EP A1 - Hanho Lee, A1 - Gerald E. Sobelman, PY - 1998 VL - 0 JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on ER -

Hanho Lee, University of Minnesota

Gerald E. Sobelman, University of Minnesota

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FPGA.1998.707936

This paper gives the digit-serial DSP libraries used to implement the digit-serial DSP architecture for field programmable gate arrays (FPGAs) and compares schematic-based FPGA design with design based on logic synthesis for digit-serial DSP libraries. It describes the design of digit-serial addition/subtraction, multiplication and delay elements and indicates also how digit-serial FIR filter can be implemented. The FPGA device utilization and critical path delay of digit-serial DSP libraries are calculated and described.

Citation:

Hanho Lee, Gerald E. Sobelman, "Digit-Serial DSP Library for Optimized FPGA Configuration," fccm, pp.322, IEEE Symposium on FPGAs for Custom Computing Machines, 1998

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