IEEE Symposium on FPGAs for Custom Computing Machines An Effective Design System for Dynamically Reconfigurable Architectures Napa Valley, California April 15-April 17 ISBN: 0-8186-8900-5
The SPARCS system is an integrated partitioning and synthesis environment for reconfigurable architectures. In this paper, we use the Joint Photographic Experts Group (JPEG) image compression algorithm as a design example to demonstrate the effectiveness of dynamic reconfiguration achieved using SPARCS. We present a typical design process using the SPARCS system consisting of temporal partitioning, spatial partitioning, and design synthesis. The results, obtained on a commercial RC architecture, show that the multiply-reconfigured version of the JPEG compression algorithm achieves reasonable improvement in execution times compared to the one-time configured version.
Citation:
Sriram Govindarajan, Iyad Ouaiss, Meenakshi Kaul, Vinoo Srinivasan, Ranga Vemuri, "An Effective Design System for Dynamically Reconfigurable Architectures," fccm, pp.312, IEEE Symposium on FPGAs for Custom Computing Machines, 1998 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||