loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
IEEE Symposium on FPGAs for Custom Computing Machines
Scalable Network Based FPGA Accelerators for an Automatic Target Recognition Application
Napa Valley, California
April 15-April 17
ISBN: 0-8186-8900-5
ASCII Text
x 
 
Ruth Sivilotti, Young Cho, Wen-King Su, Danny Cohen, Brian Bray, "Scalable Network Based FPGA Accelerators for an Automatic Target Recognition Application," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 282, IEEE Symposium on FPGAs for Custom Computing Machines, 1998.
 
 
BibTex
x
 
@article{ 10.1109/FPGA.1998.707917,
author = {Ruth Sivilotti and Young Cho and Wen-King Su and Danny Cohen and Brian Bray},
title = {Scalable Network Based FPGA Accelerators for an Automatic Target Recognition Application},
journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on},
volume = {0},
year = {1998},
issn = {1082-3409},
pages = {282},
doi = {http://doi.ieeecomputersociety.org/10.1109/FPGA.1998.707917},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
TI - Scalable Network Based FPGA Accelerators for an Automatic Target Recognition Application
SN - 1082-3409
SP
EP
A1 - Ruth Sivilotti,
A1 - Young Cho,
A1 - Wen-King Su,
A1 - Danny Cohen,
A1 - Brian Bray,
PY - 1998
VL - 0
JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
ER -
 
Ruth Sivilotti, Myricom, Inc.
Young Cho, Myricom, Inc.
Wen-King Su, Myricom, Inc.
Danny Cohen, Myricom, Inc.
Brian Bray, Sandia National Laboratories
Image processing, specifically Automatic Target Recognition (ATR) in Synthetic Aperture Radar (SAR) imagery, is an application area that can require tremendous processing throughput. In this paper, we describe an ATR algorithm implementation using FPGA accelerators. We will first describe the ATR algorithm that was implemented, the implementation on a single FPGA, how the FPGA nodes are connected to make a scalable system, and compare the performance to current scalable microprocessor-based implementations.
Citation:
Ruth Sivilotti, Young Cho, Wen-King Su, Danny Cohen, Brian Bray, "Scalable Network Based FPGA Accelerators for an Automatic Target Recognition Application," fccm, pp.282, IEEE Symposium on FPGAs for Custom Computing Machines, 1998
Usage of this product signifies your acceptance of the Terms of Use.