M. Motomura, Y. Aimoto, A. Shibayama, Y. Yabe, M. Yamashina, "An Embedded DRAM-FPGA Chip with Instantaneous Logic Reconfiguration," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 264, IEEE Symposium on FPGAs for Custom Computing Machines, 1998.

@article{ 10.1109/FPGA.1998.707909,
author = {M. Motomura and Y. Aimoto and A. Shibayama and Y. Yabe and M. Yamashina},
title = {An Embedded DRAM-FPGA Chip with Instantaneous Logic Reconfiguration},
journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on},
volume = {0},
year = {1998},
issn = {1082-3409},
pages = {264},
doi = {http://doi.ieeecomputersociety.org/10.1109/FPGA.1998.707909},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}

TY - CONF
JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
TI - An Embedded DRAM-FPGA Chip with Instantaneous Logic Reconfiguration
SN - 1082-3409
SP
EP
A1 - M. Motomura,
A1 - Y. Aimoto,
A1 - A. Shibayama,
A1 - Y. Yabe,
A1 - M. Yamashina,
PY - 1998
VL - 0
JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
ER -