Configuration Compression for the Xilinx XC6200 FPGA

F
FCCM
1998
IEEE Symposium on FPGAs for Custom Computing Machines
Abstract - Configuration Compression for the Xilinx XC6200 FPGA

	This Article
	Subscribers, please Login Purchase article: $19 PDF IEEE Xplore Subscribers RSS feed
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Scott Hauck Articles by Zhiyuan Li Articles by Eric Schwabe

IEEE Symposium on FPGAs for Custom Computing Machines

Napa Valley, California

April 15-April 17

ISBN: 0-8186-8900-5

	ASCII Text	x
	Scott Hauck, Zhiyuan Li, Eric Schwabe, "Configuration Compression for the Xilinx XC6200 FPGA," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 138, IEEE Symposium on FPGAs for Custom Computing Machines, 1998.

	BibTex	x
	@article{ 10.1109/FPGA.1998.707891, author = {Scott Hauck and Zhiyuan Li and Eric Schwabe}, title = {Configuration Compression for the Xilinx XC6200 FPGA}, journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on}, volume = {0}, year = {1998}, issn = {1082-3409}, pages = {138}, doi = {http://doi.ieeecomputersociety.org/10.1109/FPGA.1998.707891}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on TI - Configuration Compression for the Xilinx XC6200 FPGA SN - 1082-3409 SP EP A1 - Scott Hauck, A1 - Zhiyuan Li, A1 - Eric Schwabe, PY - 1998 VL - 0 JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on ER -

Scott Hauck, Northwestern University

Zhiyuan Li, Northwestern University

Eric Schwabe, Northwestern University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FPGA.1998.707891

One of the major overheads in reconfigurable computing is the time it takes to reconfigure the devices in the system. This overhead limits the speedups possible in this exciting new paradigm. In this paper we explore one technique for reducing this overhead: the compression of configuration datastreams. We develop an algorithm, targeted to the decompression hardware imbedded in the Xilinx XC6200 series FPGA architecture, that can radically reduce the amount of data needed to transfer during reconfiguration. This results in an overall reduction of almost 4 in total bandwidth required for reconfiguration.

Citation:

Scott Hauck, Zhiyuan Li, Eric Schwabe, "Configuration Compression for the Xilinx XC6200 FPGA," fccm, pp.138, IEEE Symposium on FPGAs for Custom Computing Machines, 1998

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.