G.H. Chapman, Sch. of Eng. Sci., Simon Fraser Univ., Burnaby, BC, Canada
B. Dufort, Sch. of Eng. Sci., Simon Fraser Univ., Burnaby, BC, Canada
The complexity and speed of monolithic FPGA based custom computers has been set by the presence of defective sections which limit chip area. Test FPGAs show that laser link defect avoidance routing around flawed blocks generates delays
Index Terms:
field programmable gate arrays; laser defect correction applications; defective sections; complexity; speed; monolithic FPGA based custom computers; chip area; test FPGAs; laser link defect avoidance routing; flawed blocks; delays; active switches; error cell distribution
Citation:
G.H. Chapman, B. Dufort, "Laser defect correction applications to FPGA based custom computers," fccm, pp.240, 5th IEEE Symposium on FPGA-Based Custom Computing Machines (FCCM '97), 1997