5th IEEE Symposium on FPGA-Based Custom Computing Machines (FCCM '97) Napa Valley, CA April 16-April 18 ISBN: 0-8186-8159-4
The complexity and speed of monolithic FPGA based custom computers has been set by the presence of defective sections which limit chip area. Test FPGAs show that laser link defect avoidance routing around flawed blocks generates delays
Index Terms:
field programmable gate arrays; laser defect correction applications; defective sections; complexity; speed; monolithic FPGA based custom computers; chip area; test FPGAs; laser link defect avoidance routing; flawed blocks; delays; active switches; error cell distribution
Citation:
G.H. Chapman, B. Dufort, "Laser defect correction applications to FPGA based custom computers," fccm, pp.240, 5th IEEE Symposium on FPGA-Based Custom Computing Machines (FCCM '97), 1997 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||