5th IEEE Symposium on FPGA-Based Custom Computing Machines (FCCM '97) Fault simulation on reconfigurable hardware Napa Valley, CA April 16-April 18 ISBN: 0-8186-8159-4
The authors introduce a new approach to fault simulation, using reconfigurable hardware to implement a critical path tracing algorithm. The performance estimate shows that the approach is at least on order of magnitude faster than serial fault emulation used in prior work.
Index Terms:
reconfigurable architectures; reconfigurable hardware; fault simulation; critical path tracing algorithm; performance estimate; combinational circuits
Citation:
M. Abramovici, P. Menon, "Fault simulation on reconfigurable hardware," fccm, pp.182, 5th IEEE Symposium on FPGA-Based Custom Computing Machines (FCCM '97), 1997 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||