FPGA synthesis on the XC6200 using IRIS and Trianus/Hades (or from heaven to hell and back again)

F
FCCM
1997
5th IEEE Symposium on FPGA-Based Custom Computing Machines (FCCM '97)
Abstract - FPGA synthesis on the XC6200 using IRIS and Trianus/Hades (or from heaven to hell and back again)

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5th IEEE Symposium on FPGA-Based Custom Computing Machines (FCCM '97)

Napa Valley, CA

April 16-April 18

ISBN: 0-8186-8159-4

	ASCII Text	x
	R. Woods, S. Ludwig, J. Heron, D. Trainor, S. Gehring, "FPGA synthesis on the XC6200 using IRIS and Trianus/Hades (or from heaven to hell and back again)," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 155, 5th IEEE Symposium on FPGA-Based Custom Computing Machines (FCCM '97), 1997.

	BibTex	x
	@article{ 10.1109/FPGA.1997.624615, author = {R. Woods and S. Ludwig and J. Heron and D. Trainor and S. Gehring}, title = {FPGA synthesis on the XC6200 using IRIS and Trianus/Hades (or from heaven to hell and back again)}, journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on}, volume = {0}, year = {1997}, issn = {1082-3409}, pages = {155}, doi = {http://doi.ieeecomputersociety.org/10.1109/FPGA.1997.624615}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on TI - FPGA synthesis on the XC6200 using IRIS and Trianus/Hades (or from heaven to hell and back again) SN - 1082-3409 SP EP A1 - R. Woods, A1 - S. Ludwig, A1 - J. Heron, A1 - D. Trainor, A1 - S. Gehring, PY - 1997 KW - field programmable gate arrays; FPGA synthesis; XC6200; IRIS; Trianus/Hades; FIR filter structures; Xilinx XC6200 technology; architectural synthesis tool; Custom Computing Machines VL - 0 JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on ER -

R. Woods, Inst. of Adv. Microelectron., Queen's Univ., Belfast, UK

S. Ludwig, Inst. of Adv. Microelectron., Queen's Univ., Belfast, UK

J. Heron, Inst. of Adv. Microelectron., Queen's Univ., Belfast, UK

D. Trainor, Inst. of Adv. Microelectron., Queen's Univ., Belfast, UK

S. Gehring, Inst. of Adv. Microelectron., Queen's Univ., Belfast, UK

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FPGA.1997.624615

The implementation of a number of FIR filter structures in the Xilinx XC6200 technology is presented. The designs have been implemented using a combination of IRIS, an architectural synthesis tool and Trianus/Hades a set of integrated tools for implementing algorithms on Custom Computing Machines. The main attraction of this approach is that it allows algorithms to be compiled quickly allowing performance changes to be made at the architectural level in IRIS rather than at the FPGA layout level.

Index Terms:

field programmable gate arrays; FPGA synthesis; XC6200; IRIS; Trianus/Hades; FIR filter structures; Xilinx XC6200 technology; architectural synthesis tool; Custom Computing Machines

Citation:

R. Woods, S. Ludwig, J. Heron, D. Trainor, S. Gehring, "FPGA synthesis on the XC6200 using IRIS and Trianus/Hades (or from heaven to hell and back again)," fccm, pp.155, 5th IEEE Symposium on FPGA-Based Custom Computing Machines (FCCM '97), 1997

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