IEEE Symposium on FPGA's for Custom Computing Machines (FCCM '95) Emulating static faults using a Xilinx based emulator Napa Valley, California April 19-April 21 ISBN: 0-8186-7086-X
Abstract: Fault emulation is a logical extension of current trend of using multiple FPGAs for ASIC emulation. This paper presents the basic infrastructure needed for such an emulator, and discusses the advantages of using a fault emulator as compared to a fault simulator.
Index Terms:
field programmable gate arrays; fault location; logic testing; Xilinx based emulator; static faults emulation; fault emulation; logical extension; multiple FPGAs; ASIC emulation; fault emulator
Citation:
R.W. Wieler, Z. Zhang, R.D. McLeod, "Emulating static faults using a Xilinx based emulator," fccm, pp.0110, IEEE Symposium on FPGA's for Custom Computing Machines (FCCM '95), 1995 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||