Issues in wireless video coding using run-time-reconfigurable FPGAs

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	Similar Articles Articles by B. Schoner Articles by C. Jones Articles by J. Villasenor

IEEE Symposium on FPGA's for Custom Computing Machines (FCCM '95)

Napa Valley, California

April 19-April 21

ISBN: 0-8186-7086-X

	ASCII Text	x
	B. Schoner, C. Jones, J. Villasenor, "Issues in wireless video coding using run-time-reconfigurable FPGAs," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 0085, IEEE Symposium on FPGA's for Custom Computing Machines (FCCM '95), 1995.

	BibTex	x
	@article{ 10.1109/FPGA.1995.477413, author = {B. Schoner and C. Jones and J. Villasenor}, title = {Issues in wireless video coding using run-time-reconfigurable FPGAs}, journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on}, volume = {0}, year = {1995}, isbn = {0-8186-7086-X}, pages = {0085}, doi = {http://doi.ieeecomputersociety.org/10.1109/FPGA.1995.477413}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on TI - Issues in wireless video coding using run-time-reconfigurable FPGAs SN - 0-8186-7086-X SP EP A1 - B. Schoner, A1 - C. Jones, A1 - J. Villasenor, PY - 1995 KW - video coding; multimedia communication; wireless LAN; reconfigurable architectures; time-sharing systems; field programmable gate arrays; wireless video coding; run-time-reconfigurable FPGA; field programmable gate arrays; rapid reconfiguration; time-share hardware; gates; coding stages; reconfiguration overhead; run-time reconfiguration; temporal partitioning; adaptivity; multimedia communication VL - 0 JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on ER -

B. Schoner, Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA

C. Jones, Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA

J. Villasenor, Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FPGA.1995.477413

Abstract: Video coding has been implemented by using rapid reconfiguration to time-share hardware for several sequential stages. This allows the number of gates to be reduced by a factor proportional to the number of coding stages at the expense of some reconfiguration overhead and the added memory and control needed to implement reconfiguration. The results of this work suggest that run-time reconfiguration is a powerful technique with potential for a wide range of applications in which temporal partitioning and adaptivity are feasible and desired.

Index Terms:

video coding; multimedia communication; wireless LAN; reconfigurable architectures; time-sharing systems; field programmable gate arrays; wireless video coding; run-time-reconfigurable FPGA; field programmable gate arrays; rapid reconfiguration; time-share hardware; gates; coding stages; reconfiguration overhead; run-time reconfiguration; temporal partitioning; adaptivity; multimedia communication

Citation:

B. Schoner, C. Jones, J. Villasenor, "Issues in wireless video coding using run-time-reconfigurable FPGAs," fccm, pp.0085, IEEE Symposium on FPGA's for Custom Computing Machines (FCCM '95), 1995

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