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Formal Methods in Computer Aided Design (FMCAD'06)
Enabling Large-Scale Pervasive Logic Verification through Multi-Algorithmic Formal Reasoning
San Jose, California, USA
November 12-November 16
ISBN: 0-7695-2707-8
ASCII Text
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Tilman Glokler, Jason Baumgartner, Devi Shanmugam, Rick Seigler, Gary Van Huben, Barinjato Ramanandray, Hari Mony, Paul Roessler, "Enabling Large-Scale Pervasive Logic Verification through Multi-Algorithmic Formal Reasoning," Formal Methods in Computer Aided Design, pp. 3-10, Formal Methods in Computer Aided Design (FMCAD'06), 2006.
 
 
BibTex
x
 
@article{ 10.1109/FMCAD.2006.12,
author = {Tilman Glokler and Jason Baumgartner and Devi Shanmugam and Rick Seigler and Gary Van Huben and Barinjato Ramanandray and Hari Mony and Paul Roessler},
title = {Enabling Large-Scale Pervasive Logic Verification through Multi-Algorithmic Formal Reasoning},
journal ={Formal Methods in Computer Aided Design},
volume = {0},
year = {2006},
isbn = {0-7695-2707-8},
pages = {3-10},
doi = {http://doi.ieeecomputersociety.org/10.1109/FMCAD.2006.12},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Formal Methods in Computer Aided Design
TI - Enabling Large-Scale Pervasive Logic Verification through Multi-Algorithmic Formal Reasoning
SN - 0-7695-2707-8
SP3
EP10
A1 - Tilman Glokler,
A1 - Jason Baumgartner,
A1 - Devi Shanmugam,
A1 - Rick Seigler,
A1 - Gary Van Huben,
A1 - Barinjato Ramanandray,
A1 - Hari Mony,
A1 - Paul Roessler,
PY - 2006
KW - null
VL - 0
JA - Formal Methods in Computer Aided Design
ER -
 
Tilman Glokler, IBM Deutschland Entwicklung GmbH
Jason Baumgartner, IBM Systems & Technology Group
Devi Shanmugam, IBM Systems & Technology Group
Rick Seigler, IBM Systems & Technology Group
Gary Van Huben, IBM Systems & Technology Group
Barinjato Ramanandray, IBM Deutschland Entwicklung GmbH
Hari Mony, IBM Systems & Technology Group
Paul Roessler, IBM Systems & Technology Group
Pervasive Logic is a broad term applied to the variety of logic present in hardware designs, yet not a part of their primary functionality. Examples of pervasive logic include initialization and self-test logic. Because pervasive logic is intertwined with the functionality of chips, the verification of such logic tends to require very deep sequential analysis of very large slices of the design. For this reason, pervasive logic verification has hitherto been a task for which formal algorithms were not considered applicable.

In this paper, we discuss several pervasive logic verification tasks for which we have found the proper combination of algorithms to enable formal analysis. We describe the nature of these verification tasks, and the testbenches used in the verification process. We furthermore discuss the types of algorithms needed to solve these verification tasks, and the type of tuning we performed on these algorithms to enable this analysis.

Citation:
Tilman Glokler, Jason Baumgartner, Devi Shanmugam, Rick Seigler, Gary Van Huben, Barinjato Ramanandray, Hari Mony, Paul Roessler, "Enabling Large-Scale Pervasive Logic Verification through Multi-Algorithmic Formal Reasoning," fmcad, pp.3-10, Formal Methods in Computer Aided Design (FMCAD'06), 2006
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